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Advanced Computer Architecture & Organization: HD Course

سرفصل های دوره

Learn Computer Architecture, Computer Organization, ISA, CPU Design, CISC & RISC Architectue, Pipelining, I/O & more.


1 - Introduction
  • 1 - What is computer architecture

  • 2 - Instruction Set Architecture
  • 2 - Instruction Set Architecture
  • 2 - Isa-1.pdf
  • 2 - Isa-2.pdf
  • 3 - Adressing-modes-1.pdf
  • 3 - Adressing-modes-2.pdf
  • 3 - Different Addressing Modes
  • 4 - Classification of Machines CPU on the basis of operant and result location
  • 5 - RISCvsCISC-1.pdf
  • 5 - RISC and CISC architecture
  • 5 - Risc-and-cisc-2.pdf

  • 3 - Memory Module
  • 6 - Concept Of Memory
  • 7 - 07-main-memory.pdf
  • 7 - Main Memory
  • 8 - Cache Memory
  • 8 - Cache-memory.pdf
  • 9 - Memory management

  • 4 - CPU Design
  • 1 - CPU design section quiz.html
  • 10 - Introduction to CPU
  • 10 - cpu2.pdf
  • 11 - Register Organization
  • 11 - Register-organization1.pdf
  • 11 - Register-organization-2.pdf
  • 12 - Concept of Program execution
  • 13 - Processor organization a unibus or single bus implementation
  • 13 - Uni-bus.pdf
  • 14 - Multi-bus.pdf
  • 14 - Processor organization a multiple bus organization
  • 15 - Complete-instruction-execution-1.pdf
  • 15 - Complete-instruction-execution-2.pdf
  • 15 - Execution of a complete instruction
  • 16 - Control Signals
  • 17 - 2CO-N2.pdf
  • 17 - Memory Address Register MAR circuitry
  • 18 - 2CO-N2.pdf
  • 18 - Memory Buffer Register MBR circuitry
  • 19 - Register Connections
  • 20 - Control Signals for the fetch operation
  • 20 - tji-microprocessors-handout2.pdf
  • 21 - Control Signals for add operation

  • 5 - Introduction to SRC Processor
  • 2 - SRC processor section quiz.html
  • 22 - An introduction to SRC Processor
  • 22 - SRC-processor-introduction.pdf
  • 23 - SRC processor instruction formats
  • 24 - An expression evaluation
  • 25 - Different fields in SRC instructions

  • 6 - CISC and RISC Architecture
  • 26 - Historical background for understanding CISC and RISC Architecture
  • 27 - Main Characteristics of RISC
  • 27 - RISC-File-1.pdf
  • 28 - Design issues in RISC Architecture
  • 29 - Main characteristics of CISC architecture.html

  • 7 - Control Unit Design
  • 30 - 19-Control-Unit-best.pdf
  • 30 - 378-ln13.pdf
  • 30 - Chapter19-ControlUnitOperation.pdf
  • 30 - Control-Unit.pdf
  • 30 - Introduction to Control Unit
  • 31 - Hardwired implementation of control unit
  • 32 - Microprogrammed implementation of control unit part1
  • 33 - Microprogrammed implementation of the control unit part2

  • 8 - Pipelining
  • 34 - Introduction to pipelining
  • 34 - lecture-1-Introduction-to-pipelining.pdf
  • 35 - Complications Related to Pipelining
  • 36 - Designing a pipeline.html
  • 37 - Hazards in Pipelining.html

  • 9 - InputOutput Subsystems
  • 38 - Introduction to inputoutput subsystems
  • 39 - Memory mapped IO vs Isolated IO
  • 40 - Considerations during IO Subsystem Design.html
  • 41 - Designing parallel IO ports
  • 42 - InputOutput techniques
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    تاریخ انتشار: ۲۶ تیر ۱۴۰۳
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