UVM for Verification Part 1 : Fundamentals

سرفصل های دوره

Step by Step Guide for building Verification Environment from Scratch

1. How to use IDE

1. Series Intro

2. Agenda

3. Use this code for understanding IDEs.html

4. EDAplayground Link.html

5. Working with EDAP

6. Working with Vivado

7. Working with Questa

2. Reporting Mechanism

1. Agenda

2. Different Reporting Macros

3. Working with Reporting Macros

4. Code.html

5. Priniting Values of Variables without automation

6. Code.html

7. Working with Verbosity Level

8. Code.html

9. Working with Verbosity Level and ID

10. Code.html

11. Working with Individual Component

12. Code.html

13. Working with Hierarchy

14. Code.html

15. Other Reporting Macros

16. Code.html

17. Changing Severity of Macros

18. Code.html

19. Changing Associated Actions of Macros

20. Working with quit_count and UVM_ERROR

21. Code.html

22. Working with log file

23. Code.html

24. A11.html

25. A12.html

26. A13.html

27. A14.html

28. A15.html

3. Getting Started with Base Classes UVM_OBJECT

1. Agenda

2. Fundamentals P1

3. Fundamentals P2

4. Fundamentals P3

5. Target

6. Creating Class

7. Deriving class from UVM_OBJECT

8. Using Field Macros P1 INT cont

9. Code.html

10. Using Field Macros P1 INT

11. Code.html

12. Using Field Macros P2 ENUM, REAL

13. Code.html

14. Using Field Macros P3 OBJECT

15. Code.html

16. Using Field Macros P4 Arrays

17. Code.html

18. Copy and Clone Method

19. Code.html

20. Shallow Vs Deep Copy

21. Code.html

22. Copy and Clone Method

23. Code.html

24. Compare Method

25. Code.html

26. Create Method

27. Code.html

28. Factory Override new vs create method

29. Code.html

30. do_print Method

31. Code.html

32. convert2string method

33. Code.html

34. do_copy method

35. Code.html

36. do_compare

37. Building Transaction Class p.html

38. A21.html

39. A22.html

4. UVM_COMPONENT

1. Agenda

2. Understanding UVM_TREE

3. Creating UVM_COMPONENT class

4. Code.html

5. Creating UVM_TREE P1

6. Creating UVM_TREE P2

7. Code.html

8. Getting path of the component p.html

5. config_db

1. Agenda

2. Understanding typical format of config_db

3. Code.html

4. Demonstration P1

5. Demonstration P2

6. Demonstration P3

7. Demonstration P4

8. Used Case

9. Code.html

6. UVM_PHASES

1. Agenda

2. Fundamentals of Phases

3. Classification of Phases Methods Used

4. Classification of Phases Specific Purposes P1

5. Classification of Phases Specific Purposes P2

6. Classification of Phases Specific Purposes P3

7. Classification Summary

8. How we override phases

9. Code.html

10. Understanding execuction of build_phase in multiple components

11. Code.html

12. Understanding execution of connect_phase

13. Code.html

14. Execution of Multiple instance phases

15. Raising Objection

16. Code.html

17. How Time consuming phases works in Single Component

18. Code.html

19. Time Consuming phases in multiple components

20. Code.html

21. Timeout

22. Code.html

23. Drain Time Individual Component

24. Code.html

25. Drain Time Multiple Components

26. Code.html

27. Phase Debug

28. Phase Debug Switch.html

29. Objection Debug

30. Objection Debug Switch.html

31. A51.html

7. TLM

1. Agenda

2. Fundamentals

3. Blocking PUT Operation P1

4. Code.html

5. Adding IMP to Blocking PUT Operation

6. Code.html

7. Port to IMP

8. Code.html

9. PORT-PORT to IMP

10. Code.html

11. Port to Export-IMP

12. Code.html

13. Get Operation

14. Code.html

15. Transport Port

16. Code.html

17. Analysis Port

18. Code.html

19. A71.html

20. A72.html

8. Sequence

1. Agenda

2. Fundamentals

3. Creating Sequences

4. Code.html

5. Understanding Flow

6. Code.html

7. Sending Data to Sequencer

8. Code.html

9. Sending Data to Driver Method 2 P1

10. Sending Data to Driver Method 2 P2

11. Code.html

12. Multiple Sequence in Parallel

13. Code.html

14. Changing Arbitration Mechanism P1

15. Changing Arbitration Mechanism P2

16. Code.html

17. Ways to Hold access of Sequencer

18. Holding Access of Sequencer P1

19. Code.html

20. Holding access of Sequencer P2 Priority

21. Code.html

22. Holding access of Sequencer P3 Lock Method

23. Code.html

24. Holding access of Sequencer P4 Grab Method.html

25. Code.html

9. Projects Combinational Adder

1. Agenda

2. Summary of the Verification Environment

3. Verification of Combinational adder DUT

4. Transaction Class

5. Sequence Class

6. Driver Class

7. Monitor Class

8. Scoreboard Class

9. Agent Class

10. Environment Class

11. Test Class

12. Testbench Top

13. DUT + Interface.html

14. Testbench.html

15. A91.html

10. Projects Verification of Sequential Adder

1. Design + Interface

2. Transaction + Generator

3. Driver

4. Monitor + Scoreboard

5. Agent + ENV + TEST

6. Testbench Top

7. DUT + Interface.html

8. Testbench.html

9. A101.html

11. Next Course of UVM Series

1. UVM for Verification Part 2 Projects.html

139,000 تومان

خرید اشتراک افزودن به سبد خرید

خرید دانلودی فوری

در این روش نیاز به افزودن محصول به سبد خرید و تکمیل اطلاعات نیست و شما پس از وارد کردن ایمیل خود و طی کردن مراحل پرداخت لینک های دریافت محصولات را در ایمیل خود دریافت خواهید کرد.

تولید کننده: Udemy-Training