Building a Processor with Verilog HDL from Scratch

سرفصل های دوره

Using Xilinx Vivado 2020.2

1. Adding Arithmetic Unit

1. Types of Instructions

2. Addressing Modes

3. Understanding Intruction Register

4. Adding Instruction Register and GPR to Processor

5. Understanding Arithmetic and Move intructions of Processor

6. Adding MOV Instructions

7. Adding Arithmetic Instructions

8. Adding TB to verify Instructions P1

9. Adding TB to verify Instructions P2

2. Adding Logical Unit

1. Supported Logical Operations

2. Adding Logical operations to RTL

3. Adding TB to verify Logical Operations

4. Analyzing RTL output

3. Adding Conditions Flags

1. Condition flags usage

2. Logic for Carry, Sign, and Zero Flag

3. Logic for Overflow flag

4. Adding Carry, Sign, and Zero flag to RTL

5. Adding Overflow flag to RTL

6. Verifying operation of condition flags

4. Adding Program and Data memory

1. Processor architecture based on Memory model

2. Working with Memory Generator IP

3. Working with Verilog arrays

4. Adding Memory to Processor RTL P1

5. Converting independent always block to tasks

6. Adding logic to read Instructions from Program Memory after fixed delay

7. Adding Instructions to work with Ports and Data Memory

8. Program use for testing operation of RTL

9. Adding TB to verify operation of RTL

5. Adding Jumping and Branching Instructions

1. Branch and Jump Instructions our processor support

2. Operation of Jump Instructions

3. Adding Jump instructions to Processor RTL

4. Modifying FSM to incorporate Jump, Branch and Halt Flowchart

5. Adding FSM to RTL

6. Testing existing program with new FSM

7. Code to Verify Jump and Branch Instructions

8. Executing Testbench Code

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تولید کننده: Udemy-Training